The invention relates to a method for testing electronic components in a test apparatus (prober), and to a test apparatus for carrying out the method.
During the production of semiconductor components, firstly a multiplicity of chips are structured on a wafer composed of semiconductor material. Since the chips are generally rectangular, they are arranged in rows and columns on the wafer, such that the chips in each row and in each column have a common boundary line (also referred to as scribe lines or streets) with respect to each adjacent row and column, respectively. Before the chips of the wafer are singulated to form dies, they are subjected to various tests in a prober.
The singulation of the chips to form dies is effected either in a “dicing before grinding” process, in which on the wafer firstly scribing trenches are produced in a sawing process along the boundary lines of all the rows and columns of chips, the depth of said trenches being smaller than the thickness of the wafer, and then the remaining material of the wafer is ground away from the opposite side of the wafer to the scribing trenches, or in a “grinding before dicing” process, in which the wafer is firstly ground away from the passive side down to the desired thickness and then the wafer is sawn through along the boundary lines of all the rows and columns of chips.
In the arrangement of the chips on the wafer, the width of the sawing tool is taken into account, that is to say that the distance between two adjacent chips is chosen to be at least as large as the width of the sawing tool, since the wafer material removed in the sawing process is lost. In other words, the expression boundary line, as used hereinafter, denotes a material strip of finite width arranged between two adjacent chips.
It is known to structure additional components, for example transistors that are typical of the chips arranged on the wafer, on the lost material of the boundary lines and likewise to subject said components to specific tests in the course of the testing of the chips still arranged in the wafer assembly, for example in order to obtain statements about the process state for monitoring purposes. Further applications of the additional components relate to experiments with regard to further design possibilities (device characterization and modelling) and also reliability tests. Whereas in general only the horizontal boundary lines, that is to say the material strips situated between each two rows of chips, have been used hitherto for the additional components, the increased demand for information obtained at said additional components requires the vertical boundary lines, that is to say the material strips situated between each two columns of chips, also to be used as far as possible for the structuring of additional components.
If both the horizontal and the vertical boundary lines are used for the structuring of additional components, it must also be ensured that the additional components can be tested, that is to say that the additional components can be contact-connected by the test probes of a prober used for the testing. Within the prober, the wafer for carrying out the tests is deposited and fixed on a wafer holder, a so-called chuck. Such chucks usually have a drive that enables a translational movement of the wafer receptacle in all three spatial directions and rotational movement about the vertical axis, but the rotation is restricted to a few degrees.
Proceeding from this prior art it is an object of the present invention to specify a method and an apparatus which make it possible to be able to test optionally both the additional components arranged on horizontal boundary lines and the additional components arranged on vertical boundary lines.